GigaBaudics

10 Gb/s PROGRAMMABLE DIGITAL DELAY LINE - MODEL PDDL10

FEATURES

0 to 10 Gb/s operation 5 ps step size 7 bit delay range 40 ps rise/fall times

Less than 10 ps jitter, <5 ps typical Adjustable input threshold Differential ECL outputs TTL compatible programming

PRODUCT DESCRIPTION ... SPECIFICATIONS ... PROGRAMMING ... CIRCUIT DIAGRAM ... POWER REQUIREMENTS ... PRICING AND AVAILABILITY ... HOME PAGE

PRODUCT DESCRIPTION

The PDDL10 is a precision time delay generator for digital signals. Delays are controlled precisely in 5 increments from 0 to 635 ps.. Data rates through 10 gigabits per second are supported for very high-speed applications. Delays can be programmed via a TTL bus.

In GaAs and ECL IC and system testing, the most critical problems involve precisely shifting the relative timing of two or more high-speed signals. The relative timing of two signals may need to be varied in order to determine or to satisfy the critical timing parameters of some high-performance ECL and GaAs systems. High accuracy and high data rates make the PDDL10 well suited to meet the test requirements in bench-top or high-speed ATE systems. A low hysteresis strategy, that reduces variation in threshold crossing as a function of duty cycle or run length, provides a high degree of accuracy and low jitter at all data rates and delays. DC coupling is used to provide accurate timing control for systems with varying duty cycle such as NRZ and burst data applications. Fast 40 ps rise/fall times and low noise transitions enhance its accuracy. The PDDL10 has differential ECL outputs, which may be used, independently, as single-ended outputs.

Unlike delay generators that employ ramping techniques or multistage active devices for delay generation, the PDDL10 uses the delays produced by using passive GaAs switches to select a combination of fixed length transmission lines. As a result the PDDL10 has an extended range and can go beyond delays that are less than 1 period in length. Also, passive switches have the advantage of not causing added hysteresis unlike delay lines that use active devices for line switching. Hysteresis is further reduced by compensation techniques. As a result, the delayed signal exhibits very low deterministic jitter. The PDDL10 is much more reliable, has faster state changes, higher range and is much less expensive than mechanical delay lines.

PDDL10 FUNCTION DIAGRAM

PROGRAMMING

The delay state has a 7 bit programming range. Each of the 7 programming bits (D0-D6) corresponds to a binary weighted delay giving a total of 2e⁷ = 128 possible delay combinations and delay range of 5x128=640ps. To program, bring latch line "LE" high, apply the desired delay code to bit 1 through 10, then bring LE low to latch the data. If latching is not desired simply keep the latch line high and the device state will follow the applied data.

PIN CONNECTIONS

I/O CHARACTERISTICS

The input and the differential outputs are ECL compatible and connected by SMA jacks. The input is internally terminated to Vtt=-2.0 with a 50 ohm shunt resister. The output voltage swing is 0.7V with Vol=-1.65 and Voh=-.95. The output is capable of sourcing current only. For proper operation, outputs require a 50 ohm termination to -2.0V. The input threshold may be adjusted +/- 0.4V by applying the differential voltage to pin#8. This enables fine-tuning of the signal duty-cycle.

POWER REQUIREMENTS

The PDDL10 is powered by a single -5.0 +/-0.2V supply. Internal supply voltages are regulated to reduce the required number of external supplies and to reduce the level of supply noise appearing on signal path. This improves threshold variation with changes in supply voltages effectively reducing supply noise to the signal. Power is provided  by the D-type connector. Pins 8 through 10 are -5.0V and pins 11 and 12 are GND. Caution should be taken to control the power supply voltage drop if a ribbon cable is used by minimizing the cable length and by using heavy gauge wire. Total power dissipation is typically 0.7 watts. Power dissipation can increase up to 2 watts for rapid programming rates. It is recommended that 1.0 amp. external current limiting be provided since this device has limited over-voltage and reverse voltage protection. For typical applications no thermal management is required. In many cases GigaBaudics can modify the input specifications, the output drive characteristics or the delay step size to help meet the special requirements of the customer, often at no additional cost. Please contact GigaBaudics if there are questions and we will be happy to provide you with further information or clarification.

SPECIFICATIONS

• Signal rate: ________________ 0 to 10 Gb/s (DC to 5 GHz)
• Range: ____________________ step size times 128 (7 bits)
• Step size: __________________ 5
• Accuracy: _________________ +/-5 ps
• __________________________ +/-5 ps between consecutive delays
• Temperature sensitivity: _____ <0.04 ps per ⁰F at 70⁰F
• INPUT threshold: ___________ adjustable >-1.7 to -0.9
• INPUT termination: _________ 50 ohms to -2.0V
• Insertion delay: _____________ 375-425 ps (0 ps programmed delay)
• INPUT requirements: ________ High >Vth + 0.2
• __________________________ Low < Vth -0.2
• _________________________ >2 volts/ns slew rate
• minimum input pulse width ___  100 ps
• Control signal setup time: ____ 0 ns
• Control signal propagation delay:_ 12 ns
• Delay-state switch time: ______ <75 ns
• Output termination: _________ 50 ohms to -2.0V
• Output high: _______________ >-0.95 (50 ohms to -2.0)
• Output low: ________________ <-1.65 (50 ohms to -2.0)
• Rise time (20 to 80%): _______ <45 ps
• Fall time(20 to 80%): ________ <45 ps
• Output current source: _______ 17 mA
• Output current sink: _________ 0 mA
• Total jitter: ________________ <10 ps
• Power requirements: ________ -5.0+0.05 volts, 0.5 Amps.
• Warm up time: _____________ 5 minutes to reduce drift
• Physical Dimension: _________ 2.73 x 1.75 x 0.6 inches
• __________________________ (excluding connectors)
• Outline drawing: PDDL10ol.jpg

  ABSOLUTE MAXIMUM RATINGS
(beyond which damage may occur)

• Voltage at ECL input: ________________ -4.0 to +1.5
• Voltage at TTL inputs:________________-0.5 min, +7.0 max.
• Current at any output: _______________ -40 mA
• Minimum 50 ohm termination voltage:__ -3.0
• Maximum output voltage forced: _______ 0.8
• Minimum load impedance terminated in -2.0 V: _25 ohms
• Supply voltage: _____________________ +0.8 to -6.8
• Inputs and outputs are static sensitive.  No warranty will be extended to damaged inputs or output drivers.

Price: $ 2300 ______Price subject to change without notice

Please use e-mail for any correspondences, either technical or administrative, at address postman@gigabaudics.com

    GigaBaudics    5266 Hollister Ave. Ste 221 ● Goleta, CA  93111 ● (805) 687-5934