4 GHz, 4 CHANNEL PROGRAMMABLE DELAY LINE
MODEL SERIES QPADL
DISCONTINUED - see models QPADL3 and QPADL6
PRODUCT DESCRIPTION .... SPECIFICATIONS ....PROGRAMMING .... CIRCUIT DIAGRAM .... TRANSFER CHARACTERISTICS .... PRICING AND AVAILABILITY ... HOME PAGE
The QPADL is a programmable delay line instrument with 4 independent channels designed for adjusting the time delay or phase of radio, microwave or even digital signals with bandwidths from DC to 4 GHz.
This instrument can be an attractive alternative to either the manually operated, hand-cranked, line stretchers which are very time consuming when delays have to be changed frequently or the servo-controlled line stretchers which are expensive and wear out quickly. It also has the advantage of lower mismatch, higher bandwidth and higher range than delay lines that use lumped or distributed varactor elements.
Delays are controlled precisely in standard step sizes of 5 or 10 picoseconds or in any custom step size within this range. The delays are 10 bit programmable giving a total of 2e10=1024 steps. Therefore the QPADL-5 or-10 have a delay range of 5115 and 10,230 ps respectively. When this device is used as a programmable narrow band phase shifter the phase shifts are proportional to the frequency. The equivalent phase shift for a delay, is 0.36 deg./psGHz or 2.78 ps = 1 deg/GHz.
The QPADL programmable delay lines employ all GaAs passive microwave switched-line techniques. Lines are switched in a series configuration so that each delay occurs additively with any other switched-in delay. The signal is DC coupled therefore has no lower band limit. Since no active elements are used, input power of as high as 20 dBm may be used and still yield less than 1 dB compression.
The QPADL is calibrated to maintain a high degree of delay accuracy over a wide range of frequencies. The delay accuracy is better than 1 LSB. This device has high delay monotonicity. The accuracy maintained between consecutive delays is 1/2 LSB for the QPADL-10 and 1 LSB for the QPADL-5. The differential loss between delay elements is balanced so that the total loss does not vary widely between delay states.
SMA jacks connect inputs and outputs, while a standard 25 pin D-type connector connects data and control signals. Power can be connected either through the D-sub connector or the banana jack. This instrument is provided in a low profile rugged aluminum housing and requires a single, low power, 5V supply making this instrument very easy to use.
The delay lines I/O provide a good match of 50 ohms relative to ground yielding a VSWR of less than 1.3 from DC to 3 GHz and less than 1.5 to 4 GHz. This enhances its usefulness in applications where the signal source and termination are not well matched. Poorly matched I/O terminations can generate reflections, which may result in delay-shift aberrations when the incident signal and the reflected signal are coincident.
Fast TTL control logic is used in this instrument for applications requiring rapid delay-state changes. For these high-speed programming applications, option "T" can be used to provide the control lines with 110-ohm terminations into the TTL input threshold voltage. This minimizes control signal reflections for delay-state changes up to exceeding 50 MHz.
The diagram above shows the typical transfer characteristics. The differential loss between arbitrary delay states is less than +0.5 dB DC to 2 GHz, +1.0 dB from 2 to 3 GHz and +1.5 dB from 3 to 4 GHz.
Each of the 10 programming bits represent a binary number corresponding to a delay equal to the binary number times the step size. Each channel is addressed (selected) by a separate address line A0, A1, A2 and A3. This allows any combination of channels to be programmed simultaneously. The WE (write enable) line is activated (low) while data is valid. The DS (device select) line, active low, is useful for selecting a particular unit when more than one unit is used in conjunction. Data, address and DS should be held valid for at least 4 ns and should remain valid 3 ns after WE goes high. The control word need not be latched if the user wishes to operate the latches transparently. Simply keep the address line, DS and WE low and the delay-state of the selected channel will follow the applied data.
25 pin D-type subminiature connector
Pin #_______ Function
The QPADL uses a single 5V supply. The current requirement is about 50 mA but may increase up to 200 mA for rapid programming rates. Power dissipation is less than 1 watt. Internal supply voltages are regulated to eliminate supply noise coupling to the signal path. All internal voltages are generated from the single 5V supply, thereby simplifying power-up.
ABSOLUTE MAXIMUM RATINGS
(beyond which damage may occur)
Price: $ 6200 Price and specifications subject to change without notice.
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